65CE02 Opcodes

  • Name: name of instruction (e.g. "LDA")
  • Mode: addressing mode (e.g. "REL" for branch)
  • Reserved: is it a resevered / undocumented (aka illegal) opcode
  • Bytes: bytes used for command
  • Cycles: cycles taken (without extra for e.g. page crossing)
  • ExtraCycles: extra cycles taken when crossing a page(a) and/or taking a branch(b)
Name Mode Reserved Bytes Cycles ExtraCycles
$00 BRK #IM 2 7
$10 BPL REL 2 2
$20 JSR ABS 3 5
$30 BMI REL 2 2
$40 RTI 1 5
$50 BVC REL 2 2
$60 RTS 1 4
$70 BVS REL 2 2
$80 BRA REL 2 2
$90 BCC REL 2 2
$A0 LDY #IM 2 2
$B0 BCS REL 2 2
$C0 CPY #IM 2 2
$D0 BNE REL 2 2
$E0 CPX #IM 2 2
$F0 BEQ REL 2 2
$01 ORA (ZP,X) 2 5
$11 ORA (ZP),Y 2 5
$21 AND (ZP,X) 2 5
$31 AND (ZP),Y 2 5
$41 EOR (ZP,X) 2 5
$51 EOR (ZP),Y 2 5
$61 ADC (ZP,X) 2 5
$71 ADC (ZP),Y 2 5
$81 STA (ZP,X) 2 5
$91 STA (ZP),Y 2 5
$A1 LDA (ZP,X) 2 5
$B1 LDA (ZP),Y 2 5
$C1 CMP (ZP,X) 2 5
$D1 CMP (ZP),Y 2 5
$E1 SBC (ZP,X) 2 5
$F1 SBC (ZP),Y 2 5
$02 CLE 1 2
$12 ORA (ZP),Z 2 5
$22 JSR (ABS) 3 7
$32 AND (ZP),Z 2 5
$42 NEG 1 2
$52 EOR (ZP),Z 2 5
$62 RTN #IM 2 7
$72 ADC (ZP),Z 2 5
$82 STA (REL,S),Y 2 6
$92 STA (ZP),Z 2 5
$A2 LDX #IM 2 2
$B2 LDA (ZP),Z 2 5
$C2 CPZ #IM 2 2
$D2 CMP (ZP),Z 2 5
$E2 LDA (REL,S),Y 2 6
$F2 SBC (ZP),Z 2 5
$03 SEE 1 2
$13 BPL RELL 3 3
$23 JSR (ABS,X) 3 7
$33 BMI RELL 3 3
$43 ASR 1 2
$53 BVC RELL 3 3
$63 BSR RELL 3 5
$73 BVS RELL 3 3
$83 BRA RELL 3 3
$93 BCC RELL 3 3
$A3 LDZ #IM 2 2
$B3 BCS RELL 3 3
$C3 DEW ZP 2 6
$D3 BNE RELL 3 3
$E3 INW ZP 2 6
$F3 BEQ RELL 3 3
$04 TSB ZP 2 4
$14 TRB ZP 2 4
$24 BIT ZP 2 3
$34 BIT ZP,X 2 3
$44 ASR ZP 2 4
$54 ASR ZP,X 2 4
$64 STZ ZP 2 3
$74 STZ ZP,X 2 3
$84 STY ZP 2 3
$94 STY ZP,X 2 3
$A4 LDY ZP 2 3
$B4 LDY ZP,X 2 3
$C4 CPY ZP 2 3
$D4 CPZ ZP 2 3
$E4 CPX ZP 2 3
$F4 PHW #IML 3 5
$05 ORA ZP 2 3
$15 ORA ZP,X 2 3
$25 AND ZP 2 3
$35 AND ZP,X 2 3
$45 EOR ZP 2 3
$55 EOR ZP,X 2 3
$65 ADC ZP 2 3
$75 ADC ZP,X 2 3
$85 STA ZP 2 3
$95 STA ZP,X 2 3
$A5 LDA ZP 2 3
$B5 LDA ZP,X 2 3
$C5 CMP ZP 2 3
$D5 CMP ZP,X 2 3
$E5 SBC ZP 2 3
$F5 SBC ZP,X 2 3
$06 ASL ZP 2 4
$16 ASL ZP,X 2 4
$26 ROL ZP 2 4
$36 ROL ZP,X 2 4
$46 LSR ZP 2 4
$56 LSR ZP,X 2 4
$66 ROR ZP 2 4
$76 ROR ZP,X 2 4
$86 STX ZP 2 3
$96 STX ZP,Y 2 3
$A6 LDX ZP 2 3
$B6 LDX ZP,Y 2 3
$C6 DEC ZP 2 4
$D6 DEC ZP,X 2 4
$E6 INC ZP 2 4
$F6 INC ZP,X 2 4
$07 RMB0 ZP 2 4
$17 RMB1 ZP 2 4
$27 RMB2 ZP 2 4
$37 RMB3 ZP 2 4
$47 RMB4 ZP 2 4
$57 RMB5 ZP 2 4
$67 RMB6 ZP 2 4
$77 RMB7 ZP 2 4
$87 SMB0 ZP 2 4
$97 SMB1 ZP 2 4
$A7 SMB2 ZP 2 4
$B7 SMB3 ZP 2 4
$C7 SMB4 ZP 2 4
$D7 SMB5 ZP 2 4
$E7 SMB6 ZP 2 4
$F7 SMB7 ZP 2 4
$08 PHP 1 3
$18 CLC 1 1
$28 PLP 1 3
$38 SEC 1 1
$48 PHA 1 3
$58 CLI 1 1
$68 PLA 1 3
$78 SEI 1 2
$88 DEY 1 1
$98 TYA 1 1
$A8 TAY 1 1
$B8 CLV 1 1
$C8 INY 1 1
$D8 CLD 1 1
$E8 INX 1 1
$F8 SED 1 1
$09 ORA #IM 2 2
$19 ORA ABS,Y 3 4
$29 AND #IM 2 2
$39 AND ABS,Y 3 4
$49 EOR #IM 2 2
$59 EOR ABS,Y 3 4
$69 ADC #IM 2 2
$79 ADC ABS,Y 3 4
$89 BIT #IM 2 2
$99 STA ABS,Y 3 4
$A9 LDA #IM 2 2
$B9 LDA ABS,Y 3 4
$C9 CMP #IM 2 2
$D9 CMP ABS,Y 3 4
$E9 SBC #IM 2 2
$F9 SBC ABS,Y 3 4
$0A ASL 1 1
$1A INC 1 1
$2A ROL 1 1
$3A DEC 1 1
$4A LSR 1 1
$5A PHY 1 3
$6A ROR 1 1
$7A PLY 1 3
$8A TXA 1 1
$9A TXS 1 1
$AA TAX 1 1
$BA TSX 1 1
$CA DEX 1 1
$DA PHX 1 3
$EA NOP 1 1
$FA PLX 1 3
$0B TSY 1 1
$1B INZ 1 1
$2B TYS 1 1
$3B DEZ 1 1
$4B TAZ 1 1
$5B TAB 1 1
$6B TZA 1 1
$7B TBA 1 1
$8B STY ABS,X 3 4
$9B STX ABS,Y 3 4
$AB LDZ ABS 3 4
$BB LDZ ABS,X 3 4
$CB ASW ABS 3 7
$DB PHZ 1 3
$EB ROW ABS 3 7
$FB PLZ 1 3
$0C TSB ABS 3 4
$1C TRB ABS 3 4
$2C BIT ABS 3 4
$3C BIT ABS,X 3 4
$4C JMP ABS 3 3
$5C AUG ABSL 4 4
$6C JMP (ABS) 3 5
$7C JMP (ABS,X) 3 5
$8C STY ABS 3 4
$9C STZ ABS 3 4
$AC LDY ABS 3 4
$BC LDY ABS,X 3 4
$CC CPY ABS 3 4
$DC CPZ ABS 3 4
$EC CPX ABS 3 4
$FC PHW ABS 3 7
$0D ORA ABS 3 4
$1D ORA ABS,X 3 4
$2D AND ABS 3 4
$3D AND ABS,X 3 4
$4D EOR ABS 3 4
$5D EOR ABS,X 3 4
$6D ADC ABS 3 4
$7D ADC ABS,X 3 4
$8D STA ABS 3 4
$9D STA ABS,X 3 4
$AD LDA ABS 3 4
$BD LDA ABS,X 3 4
$CD CMP ABS 3 4
$DD CMP ABS,X 3 4
$ED SBC ABS 3 4
$FD SBC ABS,X 3 4
$0E ASL ABS 3 5
$1E ASL ABS,X 3 5
$2E ROL ABS 3 5
$3E ROL ABS,X 3 5
$4E LSR ABS 3 5
$5E LSR ABS,X 3 5
$6E ROR ABS 3 5
$7E ROR ABS,X 3 5
$8E STX ABS 3 4
$9E STZ ABS,X 3 4
$AE LDX ABS 3 4
$BE LDX ABS,Y 3 4
$CE DEC ABS 3 5
$DE DEC ABS,X 3 5
$EE INC ABS 3 5
$FE INC ABS,X 3 5
$0F BBR0 ZP,REL 3 4
$1F BBR1 ZP,REL 3 4
$2F BBR2 ZP,REL 3 4
$3F BBR3 ZP,REL 3 4
$4F BBR4 ZP,REL 3 4
$5F BBR5 ZP,REL 3 4
$6F BBR6 ZP,REL 3 4
$7F BBR7 ZP,REL 3 4
$8F BBS0 ZP,REL 3 4
$9F BBS1 ZP,REL 3 4
$AF BBS2 ZP,REL 3 4
$BF BBS3 ZP,REL 3 4
$CF BBS4 ZP,REL 3 4
$DF BBS5 ZP,REL 3 4
$EF BBS6 ZP,REL 3 4
$FF BBS7 ZP,REL 3 4

Also note that the 65CE02 uses the term basepage (BP) instead of zeropage (ZP), since it is moveable. However, for better comparision with other CPUs, the term zeropage (ZP) was kept here. Also, this processor does not require any extra cycles for branches or indexed addressing modes.